This invention relates generally to the field of horizontal scanning systems for video apparatus and in particular to the control of systems operable at multiple horizontal scanning frequencies.
In a video display apparatus, scanning circuits are synchronized to a synchronizing component or sync derived from the input video signal. Hence, a video display apparatus which is operable at multiple horizontal scanning frequencies must be capable of synchronizing to a standard definition NTSC signal horizontal scanning frequency of nominally 15.734 kHz or to a high definition, Advanced Television Standards Committee, ATSC, signal having horizontal scanning frequency of nominally 33,670 kHz with 1080 active lines and interlaced scanning (1080I). In addition to synchronizing to broadcast video signals, the apparatus may be required to display computer generated non-broadcast video signals, such as, for example, a super video graphics adapter signal or SVGA, having a horizontal frequency of 37,880 kHz.
Horizontal frequency oscillators employing phase locked loop control are widely known and used in video display apparatus. Dual and triple phase locked loops are also known and used to provide functional separation between potentially conflicting requirements of synchronization and scanning waveform generation. In a dual loop configuration, a first loop may be a conventional phase locked loop in which a voltage controlled oscillator output, or an output divided therefrom is compared with horizontal synchronizing pulses derived from the video signal to be displayed. The second phase locked loop, which for example, operates at the same frequency, compares the oscillator output from the first loop with a horizontal rate pulse, for example, a retrace pulse voltage derived from or representative of defection current flow. The error voltage from the second phase comparison is used to generate a width modulated pulse signal which determines the initiation of the deflection output device turn off, and subsequently, retrace initiation, or the phase of each line within the period of a vertical scan.
The response of the first phase locked loop may be optimized for fringe area reception of broadcast video signals suffering poor signal to noise ratios. Such signals suggest that the response of the first phase locked loop is relatively slow. Accordingly, the first loop may have a narrow bandwidth to optimize phase jitter reduction. However, since a video display apparatus required to be operable with signals from a variety sources and with differing horizontal frequencies. The response of the first phase locked loop represents a compromise between a narrow bandwidth for minimized phase jitter and a wide bandwidth, fast loop response capable of rapid phase recovery. For example, a narrow bandwidth loop is suited to synchronization by low noise, non-broadcast computer generated signals, whereas and wide bandwidth, fast loop response, capable of rapid phase recovery is required for synchronization of video cassette recorder (VCR) replay signals where abrupt changes in horizontal sync. pulse phase, by as much as 10 microseconds may occurring between the beginning and end of the vertical banking interval. Hence tradeoffs in respective loop responses may be made to provide adequate weak signal performance without significant overall degradation of receiver performance. The second phase locked loop generally has a faster loop response. Accordingly, the second phase locked loop may have a wider bandwidth allowing it to track variations in the defection current due to horizontal output transistor storage time variations, or high voltage transformer tuning effects. Such tight tracking yields a straight, non-bending raster largely independent of beam current loading.
The use of voltage controlled oscillators for horizontal frequency signal generation is well known. It is known to employ an oscillator operating at a multiple of the input horizontal sync. frequency and to achieve synchronization by means of counters with a selectable counts. However, immediate scanning circuitry failure results when scanning frequency current is interrupted by count selection while scanning.
Scanning circuitry failure resulting from count selection while scanning is advantageously prevented by an inventive arrangement. A scanning generator operable at a plurality of horizontal scanning frequencies comprises an oscillator generating a signal. A divider with at least two selectable counts is coupled to the oscillator and divides the signal by a first count to generate a horizontal drive signal. A horizontal scanning amplifier generates a scanning signal responsive to the horizontal drive signal coupled thereto. A controller is coupled to the scanning amplifier and to the divider. In response to selection of another one of the plurality of horizontal scanning frequencies, the controller monitors the scanning signal and responsive to a presence the controller inhibits selecting a second of the least two selectable counts. In the absence of the scanning signal the controller enables selection of the second of the least two selectable counts and the divider generates a horizontal drive signal representative of the another one of the plurality of horizontal scanning frequencies.